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GTL 250a, b - High Speed Board Design
  GTL 250a: Transmission Line Circuits
GTL 250b: Switching Noise, Ground Bounce, Rail Collapse, and EMI
 

This two day, lecture/demo course, focuses on how the physical design and layout of signal traces, planes and cables influence signal integrity and EMI. Termination, layout and design strategies are taught to minimize signal integrity problems early in the design cycle.

The important first order effects of controlled impedance, controlled differential impedance, switching noise, cross talk, lossy lines and signal distortion from impedance discontinuities are all thoroughly reviewed. The important second order effects, such as return plane selection, switching noise form changing reference planes, serpentine delay lines, and distortion from vias and corners, are also included. All of the principles taught in this course apply to printed circuit boards and cofired ceramic and organic laminate based BGA packages.

Finally, we review the basic principles of EMI including the generation and control of common and differential currents and the three main sources for achieving electromagnetic compatibility(EMC): bandwidth control, board level design and system level design.

Specific design rules to meet clock frequencies in excess of 1 GHz are presented. In addition, a methodology is taught that can be applied to all high-speed board designs. This is based on leveraging two processes: measurement and analysis. Measurements using TDR and VNA are demonstrated. The three levels of analysis: rules of thumb, approximations and numerical simulation tools are used to analyze how physical design affects signal quality.

This is not a basics course. Extensive use is made of simulation tools and numerical examples. This is a practical engineering course for the design engineer who must solve circuit board layout and design problems on a regular basis. It is recommended that engineers who do not have a firm understanding of the basic concepts in signal integrity take the GigaTest Labs courses GTL122 and GTL130.

This class is taught by Dr. Eric Bogatin
 
 
  Day One

GTL 250a: Transmission Line Circuits

Topology, Return Paths and Termination
Simulating transmission line circuits
Point to point terminations
Stubs and loaded lines
Buss topology and terminations
Return paths and discontinuities
Demo: simulating transmission line circuits

Lossy Lines
Frequency domain analysis
Material properties
Simulating transient analysis
Geometry and material constraints for serial links
Effects of vias and discontinuities
Demo: measuring material properties

Lunch (Provided)

Cross Talk Analysis
NEXT and FEXT
Cross talk and terminations
Cross talk in busses and serpentines
Cross talk and stack up
Reducing cross talk by geometry, materials and guard traces
Demo: measuring and simulating cross talk

Differential Impedance
Differential and common impedance
Simulating differential pair circuits
Terminating differential and common modes
Cross talk and differential pairs
Mode conversion
Demo: measuring differential impedance and differential pair properties with a TDR

 

Day Two


GTL 250b: Switching Noise, Ground Bounce, Rail Collapse, and EMI

Switching Noise
Mutual inductance
Modeling and simulating switching noise
Switching noise in connectors
Switching noise in return paths
Optimizing connector, IC package design
Demo: measuring switching noise

Rail Collapse and the Power Distribution System(PDS)
As different from switching noise
Design goal of the PDS
Optimizing decoupling capacitors
Optimizing planes
IC package design for highest clock frequency operation
Demo: measuring the impedance of PDS elements

Lunch (Provided)

Board Level EMI Solutions
The origin of EMI
Differential and common currents
Common mode currents and mutual inductance
Common mode currents and return paths
Design of planes
Demo: measuring common mode currents

System Level EMI Solutions
Ferrites and cables
Cables and connectors
Bandwidth control
Enclosures, apertures and shielding
Demo: simulating bandwidth and EMI control

For information on hotels in the vicinity, click here.
You may print these pages and use them as a quote.
To check the schedule or enroll for this course, click here.
 
For more information, contact:
Gary Otonari
GigaTest Labs
134 S. Wolfe Rd
Sunnyvale, CA 94086
FAX 408-524-2700
V: 408-524-2700
garyo@gigatest.com

 
 
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